View VS133-R512_1334992.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

VS133-R512
PDRB-28998-X045-01
DATA SHEET
Memory Module Part Number
VS133-R512
Buffalo Technology
(1/7)
VS133-R512
PDRB-28998-X045-01
1. Description
168pin Registered DIMM PC133/CL=3
2. Module Specification
Item Capacity Physical Bank(s) Module Organization Module Type Speed Grade Interface Power Supply Voltage Burst Lengths DRAM Organization PCB Part No. Contact Tab Serial PD Specification 512MByte 2 64M x 72bit ECC Registered PC133/CL=3 PC100/CL=2 LVTTL 3.3V0.3V 1,2,4,8,Full 32M x 8bit SDR SDRAM ZEY8RWF-A 168pin GOLD Flash Plating Ni : min 2.00m / Au : min 0.05m Support
3. Mechanical Design and Module Pinout
Item Reference standard Mechanical Design and Pinout SDR 168Pin DIMM (PDRB-28998-X059-01) Y(PCB Height) Z1 Z2 : 43.18 mm : Undefined : 4.52 mm MAX(Double Sided)
Mechanical Design and Pinout
4. Block Diagram
Item Block Diagram Reference standard Block Diagram PC133/PC100 Registered DIMM(x8bitDRAM 2Bank) (PDRB-28998-X090-01)
Buffalo Technology
(2/7)
VS133-R512
PDRB-28998-X045-01
5. Electrical Specifications 5.1 Absolute Maximum Ratings
Parameter Voltage Any Pin Relative to Vss Supply Voltage Relative to Vss Power Dissipation Short Circuit Output Current Symbol VT VCC PD IO Value -0.3~Vcc+0.3 (max 4.6) -0.3~4.6 22 50 Unit V V W mA
5.2 Recommended Operating Conditions
Parameter Supply Voltage High Level Input Voltage Low Level Input Voltage Operating Ambient Temperature Symbol VCC VIH VIL TA MIN 3.0 2.0 -0.3 0 MAX 3.6 Vcc+0.3 0.8 70 Unit V V V C
5.3 Pin Capacitance
Parameter CK0 CK1 CK2 CK3 S0 S1 S2 S3 CKE0 CKE1 DQMB0~7 DQ0~DQ63 CB0~7 A,BA,/RAS,/CAS,/WE Symbol CICK1 CICK2 CICK3 CICK4 CIS1 CIS2 CIS3 CIS4 CICKE1 CICKE2 CIDQM1 COUT1 COUT2 CIN Maximum Pin Capacitance 18 12 12 12 9.0 9.0 9.0 9.0 18 ---- 9.0 13 13 18 Unit pF pF pF pF pF pF pF pF pF pF pF pF pF pF
CK Input Pin Capacitance
/S Input Pin Capacitance
CKE Input Pin Capacitance DQM Input Pin Capacitance DQ Input / Output Pin Capacitance Other Input Pin Capacitance
Buffalo Technology
(3/7)
VS133-R512
PDRB-28998-X045-01
5.4 D.C. Characters
Parameter Operating current Symbol ICC1 ICC2P ICC2PS Precharge Standby current in non power down mode ICC2N ICC2NS Active standby current in power down mode ICC3P ICC3PS Active standby current in non power down mode ICC3N ICC3NS Operating current (Burst mode) Auto refresh current Self refresh current Input leakage current Output High Voltage Output Low Voltage ICC4 ICC5 ICC6 IIL VOH VOL Value Unit Test Condition Burst length=1, tRC tRC (min), IO=0mA, One bank active CKE VIL(max), tCK = 12ns CKE VIL(max), tCK = CKE, /S VIH(min), tCK = 12ns CKE VIH (min), tCK = CKE VIL(max), tCK = 12ns CKE VIL(max), tCK = CKE, /S VIH(min), tCK = 12ns CKE VIH (min), tCK = tCK tCK (min) Io=0mA, One bank active tRC tRC (min) CKE 0.2V All other pins are not under test=0V 0V VIN VCC IOH = -2mA IOL = 2mA * : No guarantee against this value.
MAX 2749 * mA MAX MAX 805 * mA 805 * mA
Precharge Standby current in power down mode
MAX 1399 * mA MAX 1039 * mA MAX MAX 949 * mA 877 * mA
MAX 1849 * mA MAX 1309 * mA MAX 2749 * mA MAX 6529 * mA MAX 823 * mA MIN -10 * A MAX MIN MAX 10 2.4 0.4 * * * A V V
5.5 A.C. Timing Characters
Parameter Clock Period /CAS Latency = 2 /CAS Latency = 3 Clock High Pulse Width Clock Low Pulse Width Input Setup Time Input Hold Time Output Valid From Clock /CAS Latency = 2 /CAS Latency = 3 Output Hold From Clock /RAS to /CAS Delay /RAS Active Time /RAS Precharge Time Act to Act Command Period Row Cycle Time Average Periodic Refresh Interval Mode Register cycle time tCLK tCH tCL tSI tHI tAC tOH tRCD tRAS tRP tRRD tRC tREF tMRC 10 7.5 2.5 2.5 1.5 0.8 ---- ---- 2.7 20 45 20 15 67.5 ---- 15 1000 1000 ---- ---- ---- ---- 6 5.4 ---- ---- 100,000 ---- ---- ---- 7.8 ---- ns ns ns ns ns ns ns ns ns ns ns ns s ns Symbol MIN MAX Unit
Buffalo Technology
(4/7)
VS133-R512
PDRB-28998-X045-01
6. Serial Presence Detect (SPD) Data Structure
Byte No.
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36-61 62 63 64-66 67 68-71 72 73-90 91-92 93-94 95-98 99-125 126 127
Function
Defines # of bytes written into serial memory at module manufacturer Total # of bytes of SPD memory device Fundamental memory type (FPM, EDO, SDRAM..) # of row addresses on this assembly # Column Addresses on this assembly # Module Banks on this assembly Data Width of this assembly ... Data Width continuation Voltage interface standard of this assembly SDRAM Cycle time (highest CAS latency) SDRAM Access from Clock (highest CAS latency) DIMM Configuration type (non-parity, ECC) Refresh Rate/Type Primary SDRAM Width Error Checking SDRAM width Minimum Clock Delay Back to Back Random Column Address Burst Lengths Supported # of Banks on Each SDRAM Device CAS# Latency CS# Latency Write Latency SDRAM Module Attributes SDRAM Device Attributes: General SDRAM Cycle time (2nd highest CAS latency) SDRAM Access from Clock (2nd highest CAS latency) SDRAM Cycle time (3rd highest CAS latency) SDRAM Access from Clock (3rd highest CAS latency) Minimum Row Precharge Time Row Activate to Row Activate Min. RAS to CAS Delay Min Minimum RAS Pulse Width Density of each bank on module Command and Address signal input setup time Command and Address signal input hold time Data signal input setup time Data signal input hold time Superset Information (may be used in future) SPD Data Revision Code Checksum for bytes 0-62 Manufacturer's JEDEC ID code per JEP-108E Manufacturing Location Manufacturer's Part Number Revision Code Manufacturing Date Assembly Serial Number Manufacturer Specific Data Intel specification frequency Intel Specification CAS# Latency support
Hex Value
80 08 04 0D 0A 02 48 00 01 75 54 02 82 08 08 01 8F 04 06 01 01 1F 0E A0 60 00 00 14 0F 14 2D 40 15 08 15 08 00 12 04 7F 83 00 01 20 00 00 00 00 64 87 00
Function Supported
128Bytes 256Bytes SDR SDRAM 13 10 2Banks 72bits LVTTL 7.5ns (CL=3) 5.4ns (CL =3) ECC 7.8s x8bit x8bit 1CLK Burst Lengths (1,2,4,8,FULL) 4Banks CAS Latency =2,3 CS Latency =0 WE Latency =0 Registered with PLL Supports Write1/Read Burst Supports Precharge All Supports Auto-Precharge 10ns (CL=2) 6ns (CL=2) Non Support Non Support 20ns 15ns 20ns 45ns 256MB 1.5ns 0.8ns 1.5ns 0.8ns Undefined Rev 1.2 Checksum MELCO inc. Blank Undefined Undefined Undefined Undefined 100MHz Compatible Clock=0 CL =2,3 Undefined
128+ Unused storage locations
Buffalo Technology
(5/7)
VS133-R512
PDRB-28998-X045-01
7. Packing/Label Specification
Item Packing/Label Specification Reference standard Packing/Label Specification -for 5.25inchWidth DIMM (PDRB-28998-X062-01)
Buffalo Technology
(6/7)
VS133-R512
PDRB-28998-X045-01
8. Revision History
Rev. 01 Date Jan.24.2003 Changes Issued J.Onisi
Buffalo Technology
(7/7)

▲Up To Search▲

Price & Availability of VS133-R512

	To Download VS133-R512 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .